All stories tagged tsmc on The Silicon Valley News.
TSMC has detailed its timeline for integrating High-NA EUV lithography into its production roadmap by 2030, targeting A10 or A11 process technologies, marking a critical step for future transistor scaling and chip density.
TSMC's equipment procurement needs have surged dramatically due to unprecedented AI-driven demand, yet its capital expenditure growth lags, signaling potential capacity constraints for advanced silicon production.
LG's new maskless Laser Direct Imaging machine aims to solve the critical throughput constraints currently plaguing high-density chip packaging and interconnect scaling.
As traditional copper interconnects hit physical limits, major foundries are racing to deploy co-packaged optics, each taking a fundamentally different approach to silicon photonics integration.
ASML’s decision to raise prices on its Low-NA EUV lithography tools challenges TSMC’s capital expenditure strategy, potentially reshaping foundry capacity growth and semiconductor node progression.
TSMC reports that its A14 process technology is progressing ahead of N2, delivering notable yield and performance gains, drawing strong interest from AI, HPC, and smartphone sectors.
Japanese chipmaker Rapidus aims to disrupt the advanced foundry market with 2nm-class silicon priced around $20,000 per wafer, undercutting TSMC's rates and challenging established pricing norms.